Electronic calculator systems of the type wherein all of the main electronic functions are integrated in a single large cell integrated semiconductor chip or in a small number of such chips, are described in the following U.S. Patents, which are assigned the assignee of this invention:
U.S. Pat. No. 3,919,532 issued to Michael J. Cochran and Charles P. Grant on Nov. 11, 1975 and entitled "CALCULATOR SYSTEM HAVING AN EXCHANGE DATA MEMORY REGISTER".
U.S. Pat. No. 3,934,233 issued to Roger J. Fisher and Gerald D. Rogers on Jan. 20, 1976 and entitled "READ-ONLY-MEMORY FOR ELECTRONIC CALCULATOR".
U.S. Pat. No. 3,931,507 issued Jan. 6, 1976 to George L. Brantingham entitled "POWER-UP CLEAR IN AN ELECTRONIC DIGITAL CALCULATOR".
The concepts of these prior applications have made possible vast reductions in the cost of small personal-size calculators. Continuing efforts to reduce the cost of these products include the design of a single chip calculator system for use in large capacity calculators, such as scientific or business calculators. The chip disclosed herein may be utilized in scientific or business calculators for instance, because this chip has provisions for a number of storage registers, in addition to operational registers, as well as sufficient capacity to solve the more complicated mathematical expressions and functions used in scientific and business calculators including, for example, trigonometric and logarithmic relationships.
The present invention is related to a power up clear system for microprocessor or more specifically for an electronic calculator. An entire electronic calculator system including the power up clear system of this invention is disclosed. The electronic calculator disclosed is a serial, word organized calculator; however, the invention disclosed is also operable with parallel and digit organized calculators. Calculators known in the prior art have caused the calculator to perform a power up clear utilizing either hardwired logic circuits or by forcing a particular address into the program counter, the address defining a location in the read-only-memory where instructions are located for clearing the calculator's memories.
It was one object of this invention to provide a power up clear system for a microprocessor or calculator system. More specifically, it was an object of this invention to provide a power up clear system for a calculator or microprocessor whereby the use of complex power up clear logic circuits or the insertion of an address into the program counter could be avoided.
The foregoing objects are achieved according to the present invention as now described. In the preferred embodiment of the invention, a power up clear system is provided on semiconductor chip, the power up clear system being used in a microprocessor or calculator chip employing a prechargeable and conditionally dischargeable read-only-memory which is normally addressed by a program counter. The power up clear system includes a latch having a first state which is preferentially entered when electrical power is first applied to that circuit and a second state which is entered at some time thereafter and a series of gates or other circuit means responsive to said latch circuit for interrupting the addressing of the read-only-memory by the program counter, but not interrupting the precharging of the read-only-memory. Thus, the precharge signals applied to the read-only-memory effectively provide the address to which the read-only-memory branches upon the occurrence of power up clear condition. This address is defined either by a series of zeros or a series of ones (e.g., 000 . . . 00, or 111 . . . 11) depending on the logic convention used. That location preferably is the first instruction of a series instructions for performing the power up clear operation or a branch instruction branching the calculator to the first instruction of the power up clear series of instructions. The power up clear series of instructions are used to insert zeros into the various calculator memories, for instance.